timing

A semiconductor company based in Zürich seeks an experienced ASIC Physical Design Engineer with a strong emphasis on timing closure and sign-off. Responsibilities include maintaining timing constraints, running Static Timing Analysis, and leading ECOs. The role requires 5+ years of relevant experience, familiarity with STA tools, and scripting capabilities....

Location: Zürich, Switzerland Seniority: 5+ years (physical design with a timing focus)Own timing closure and sign-off for complex IP and SoC blocks that integrate our full-custom ComputeRAM® macros. You will drive Static Timing Analysis across corners and modes, shape clean constraints, partner closely with synthesis, place-and-route, and clock-tree...

Synthara AG in Zürich is seeking an experienced ASIC physical design engineer focused on timing closure. You will drive Static Timing Analysis across corners, shape constraints, and lead ECO loops, partnering with synthesis, P&R, and clock-tree teams to ensure robust clocks and signed-off timing.You will implement timing constraints, automate checks, and...

Own timing closure and sign-off for complex IP and SoC blocks that integrate our full-custom ComputeRAM® macros. You will drive Static Timing Analysis across corners and modes, shape clean constraints, partner closely with synthesis, place-and-route, and clock-tree teams, and lead ECO loops to convergence. Your work ensures robust clocks, predictable...

Ingénieur DFTDescription du posteLes défis sont notre moteur, notre vocation. Nous sommes une équipe de professionnels qui laisse sa marque dans l'industrie des semi-conducteurs. Nous sommes un leader dans les solutions de liaison puce-à-puce à haute vitesse et écoénergétiques, essentielles à l'évolution de l'industrie électronique, en...

Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just...

Own timing closure and sign-off for complex IP and SoC blocks that integrate our full-custom ComputeRAM® macros. You will drive Static Timing Analysis across corners and modes, shape clean constraints, partner closely with synthesis, place-and-route, and clock-tree teams, and lead ECO loops to convergence. Your work ensures robust clocks, predictable...

Own the end-to-end RTL-to-GDSII implementation for complex IP/SoC subsystems and build the backend team that scales it. You'll define the methodology, constraints, and quality metrics that the team shall adhere to. The team you lead will be responsible for synthesis, floor planning, P&R, clock tree synthesis, multi-corner STA, design for testability, and...

pgateB sucht eine erfahrene Fachperson für die Gestaltung der digitalen Transformation unserer Kunden an der Schnittstelle von Beratung, Business Analyse und technischer Umsetzung. /ppSie begleiten nationale und internationale Unternehmen bei der Einführung moderner CRM-, Marketing-Automation- und Agentic-AI-Lösungen und sind primärer Ansprechpartner...

Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just...

Own timing closure and sign-off for complex IP and SoC blocks that integrate our full-custom ComputeRAM® macros. You will drive Static Timing Analysis across corners and modes, shape clean constraints, partner closely with synthesis, place-and-route, and clock-tree teams, and lead ECO loops to convergence. Your work ensures robust clocks, predictable...

pBRUSA Elektronik AG in Buchs (CH) is seeking a System Architect specializing in Functional Safety to shape the next generation of wireless charging systems. You will own the system architecture, safety concepts and cross-functional interface definitions across hardware, software and mechanical domains. /ppYou will lead safety analyses and ASPICE-driven...

pgateB AG gestaltet die digitale Transformation unserer Kunden aktiv mit und begleitet nationale sowie internationale Unternehmen bei der Einführung moderner CRM-, Marketing-Automation- und Agentic-AI-Lösungen. Als primärer Ansprechpartner verantworten Sie Qualität, Timing und Kundenzufriedenheit in einem interdisziplinären Team. /ppSie bringen...

BRUSA Elektronik AG in Buchs (CH) is seeking a System Architect specializing in Functional Safety to shape the next generation of wireless charging systems. You will own the system architecture, safety concepts and cross-functional interface definitions across hardware, software and mechanical domains.You will lead safety analyses and ASPICE-driven...

pSafran - Navigation Timing recherche un ingénieur spécialisé en optoélectronique pour développer et industrialiser les procédés d’intégration, d’alignement et de calibration de systèmes optiques et laser. Le poste implique la maîtrise des procédés sous vide et l’amélioration continue de la capabilité. /ppVous assurerez le lien entre RD...

Safran - Navigation & Timing à Neuchâtel recrute un ingénieur électronique / système pour concevoir et définir des bancs de test, réaliser les développements logiciels en C/C# et coordonner les développements électroniques et mécaniques.Vous garantissez la qualification des équipements (IQ/OQ/PQ), rédigez la documentation associée et participez...

pgateB AG sucht eine erfahrene Fachkraft für Beratung, Projektleitung und Business Analyse. Sie begleiten nationale und internationale Kunden bei der Einführung moderner CRM-, Marketing-Automation- und Agentic-AI-Lösungen und tragen Verantwortung für Qualität, Timing und Kundenzufriedenheit. /ppIn einem interdisziplinären Team arbeiten Sie eng mit...

Own the end-to-end RTL-to-GDSII implementation for complex IP/SoC subsystems and build the backend team that scales it. You’ll define the methodology, constraints, and quality metrics that the team shall adhere to. The team you lead will be responsible for synthesis, floor planning, P&R, clock tree synthesis, multi-corner STA, design for testability, and...

ppOur client is a fast-growing, venture-backed startup redefining the boundaries of computing. The patent-pending Compute-in-Memory (CIM) technology seamlessly integrates into existing chip designs, boosting performance and energy efficiency for AI and IoT applications by orders of magnitude. /p h3Role /h3 pDirect a team of Custom Design, Layout, and...

Digital ASIC Design Engineer Aargau Canton | Hybrid An exciting opportunity is available within an innovative Swiss high-tech engineering environment developing next-generation semiconductor technologies used in world-leading scientific programs If you enjoy complex ASIC development, advanced electronics, innovation and hands-on engineering work, this...