Data Acquisition Board Designer
vor 2 Wochen
**Job Description** Your responsibilities**
Are you a passionate hardware developer who loves to tackle challenging problems that help advance basic science? Do you enjoy working with modern technologies? Then come join us to develop a next generation electronics board for data acquisition at the Compact Muon Solenoid (CMS) experiment, one of the major detectors at the LHC.
At CMS, we face the task of processing collisions between proton bunches at up to 40 MHz, which would generate an immense data rate. Our level-1 (L1) trigger, employing custom firmware logic in hundreds of FPGAs, selects promising events in microseconds for data acquisition and further detailed analysis. We're currently upgrading the trigger and data acquisition systems for the future high-luminosity phase of the LHC.
One of our R&D activities is exploring the potential of a complementary system called L1 Data Scouting, which would analyze a data stream containing all events but with just the coarse grain L1 trigger information. To fully exploit the potential of such a system, we would like to develop a novel data acquisition board based on the latest generation FPGAs and high-speed network technology - and you will be the architect of this board.
This R&D is in the broader context of the NextGen Triggers project, a 5-year collaboration between the LHC experiments and the CERN Research and Computing Departments to push forward the use and impact of innovative Artificial Intelligence technologies and high-performance computing architectures for the LHC experiments' trigger selection, data processing, and theoretical interpretation.
**Responsibilities**:
- Develop the concept, schematics and PCB layout for the new data acquisition board, and follow the manufacturing and hardware testing of the first prototypes.
- Support and contribute to the development of firmware for the board, and its integration in the L1 Data Scouting demonstrator system
- Providing day-to-day supervision of students working on the project.
- Collaborating with personnel and students from the CERN CMS L1 trigger and data scouting groups.
- Presenting work at conferences and workshops at CERN and beyond.
**Your profile**
**Skills**:
- Experience with all the steps to develop a high-speed electronics board: schematics, PCB layout, submission for production and assembly, testing, development of FPGA firmware.
- Experience with AMD Xilinx FPGAs and Systems-on-chip (Versal, Zynq) and the associated software (Vivado, Vitis) would be highly beneficial.
- Experience with the CMS L1 trigger / data acquisition systems and the associated hardware would be beneficial.
Eligibility criteria:
- You are a national of a CERN Member or Associate Member State.
- You have a professional background in Physics or Electronics Engineering (or a related field) and have either:
- a **Master's degree with 2 to 6 years** of post-graduation professional experience;
- or a **PhD with no more than 3 years** of post-graduation professional experience.
- You have never had a CERN fellow or graduate contract before.
**Additional Information**
Job closing date**:10.12.2024** at 23:59 CET.**
Contract duration: 24 months, with a possible extension up to 36 months maximum.
Working hours: 40 hours per week
Target start date: 01-February-2025
Job reference: EP-CMG-OS-2024-193-GRAP
Field of work: Applied Physics
**What we offer**
- A monthly stipend ranging between **6212** and 6828** Swiss Francs per month (net of tax)**.
- Coverage by CERN's comprehensive **health scheme** (for yourself, your spouse and children), and membership of the CERN **Pension Fund**.
- Depending on your individual circumstances: installation grant; family, child and infant allowances; payment of travel expenses at the beginning and end of contract.
- ** 30 days of paid leave per year**.
- On-the-job and formal training at CERN as well as in-house language courses for English and/or French.
**About us**
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