Aktuelle Jobs im Zusammenhang mit Senior Digital Design and Verification Engineer - Zürich - Synthara AG
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Digital Design Verification Engineer
vor 3 Wochen
Zürich, Schweiz Umbilical Advanced VollzeitSenior Digital IC Design/Verification Engineer Join an innovative semiconductor company developing high-performance digital and mixed-signal solutions. As a Digital Design & Verification Engineer, you’ll take ownership of designing, integrating, and verifying complex digital IP within a modern SoC environment. What You’ll Do Develop high-quality,...
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Senior Digital IC Design/Verification Engineer
vor 3 Wochen
Zürich, Schweiz IC Resources VollzeitSenior Digital IC Design/Verification Engineer My client is seeking a highly skilled and experienced Senior Digital Design and Verification Engineer to join their innovative team in Zürich, Switzerland. This role offers a unique opportunity to work on cutting‑edge compute‑in‑memory technology, contributing to the design and verification of our digital...
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Senior Digital IC Design
vor 3 Wochen
Zürich, Schweiz Umbilical Advanced VollzeitA semiconductor technology company located in Zürich is seeking a Senior Digital IC Design/Verification Engineer to design and verify complex digital IP within a modern SoC environment. This role requires strong skills in SystemVerilog and UVM, as well as a background in ASIC design. Candidates should have experience with processor architectures like ARM or...
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Senior Digital IC Design/Verification Engineer
vor 3 Wochen
Zürich, Schweiz IC Resources VollzeitA leading technology recruitment agency is seeking a Senior Digital Design and Verification Engineer to work in Zürich. The successful candidate will contribute to cutting-edge compute-in-memory technology, focusing on digital IP design and verification, requiring strong SystemVerilog and UVM expertise. This is an exciting opportunity for individuals ready...
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Digital Design Verification Engineer
vor 19 Stunden
Zürich, Zürich, Schweiz Umbilical Advanced VollzeitJoin an innovative semiconductor company developing high-performance digital and mixed-signal solutions. As a Digital Design & Verification Engineer, you'll take ownership of designing, integrating, and verifying complex digital IP within a modern SoC environment.What You'll DoDevelop high-quality, synthesis-ready SystemVerilog RTL for a range of digital...
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Senior Digital IC Designer
vor 3 Wochen
Zürich, Schweiz IC Resources VollzeitSenior Digital Design and Verification Engineer – Zürich, Switzerland My client is seeking a highly skilled and experienced Senior Digital Design and Verification Engineer to join their innovative team in Zürich, Switzerland. This role offers a unique opportunity to work on cutting‑in‑memory technology, contributing to the design and verification of...
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Senior Digital Hardware Engineer
Vor 6 Tagen
Zürich, Schweiz TalentCloud Group VollzeitSenior Digital Hardware Engineer (RTL & Verification) Zurich | Hybrid We are supporting one of our Swiss technology partners in their search for a Senior Digital Hardware Engineer to strengthen their growing silicon team in Zürich. This is a permanent role, is ideal for someone who enjoys owning IP blocks end-to-end, thrives in cross-functional...
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Zürich, Schweiz TalentCloud Group VollzeitA Swiss technology partner is seeking a Senior Digital Hardware Engineer in Zürich. The role involves creating and validating complex digital IPs within advanced compute platforms, utilizing SystemVerilog RTL. Candidates should have over 5 years of experience in digital design or verification with solid knowledge of synthesis concepts. This permanent...
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Senior Digital IC Designer
vor 3 Wochen
Zürich, Schweiz IC Resources VollzeitA leading engineering consulting firm is looking for a Senior Digital Design and Verification Engineer in Zürich, Switzerland. This role focuses on cutting-edge memory technology and involves implementing RTL for various control blocks. Candidates should have over 5 years of experience in digital design or verification, with strong knowledge in...
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Drone Electronics Engineer — PCB Design
vor 3 Wochen
Zürich, Schweiz Auterion VollzeitA leading technology firm in Zurich is seeking an Electronics Engineer to design and verify avionics for drones. This role requires a Bachelor's or Master's degree in Electrical or Electronics Engineering and at least 3 years of experience in PCB design. Key responsibilities include planning product verification and generating technical documentation. The...
Senior Digital Design and Verification Engineer
vor 4 Wochen
Own the design and verification of part of our digital IP portfolio that wraps and integrates our compute-in-memory technology(ComputeRAM®): clean, synthesis-ready SystemVerilog RTL, plus UVM environments that reach coverage closure and de-risk silicon. You’ll specify and build register/bus interfaces, DMA, and control logic. Expect tight collaboration with custom design, backend, and software teams to hit PPA, coverage, and time-to-tapeout simultaneously.What you’ll doImplement RTL: memory-mapped control blocks, AXI/AHB/APB bridges, FIFOs/scoreboards, arbiters, DMA, and datapaths; write synthesis-friendly code with a clear reset/CDC strategy.Extreme optimization for power, with a power-driven mindset and approach to designDevelop UVM testbenches (agents, sequencers, predictors, scoreboards); drive constrained-random + directed testing; close coverage (func/code/assertion).GLS: run gate-level sims with SDF for critical paths; support FPGA prototypes for early HW/SW bring-up.Documentation & specs: write IP/user guides, register maps, programming models; contribute reusable UVM components and regression infrastructure for the team.Outcomes (first 18 months)Tape-in of one or more IPs (or a subsystem) with coverage goals met (functional/code/assertion) and lint/CDC/RDC clean sign-off packages.Demonstrated GLS/SDF pass on the IP’s top-risk paths and correlation to FPGA results; Achieve sign-off quality.A reusable UVM kit (agents/sequences/scoreboards) and CI scripts that cut regression time and raise pass-rate stability across projects.Requirements5+ years in digital design or verification for ASIC; strong SystemVerilog RTL and basic understanding of UVMHands-on experience with either RISC-V or ARM architectures, either as a system-level integrator or as a designer.Knowledge of synthesis basics and how RTL choices impact timing/power/areaClear technical communication, ability to work with structured specs, and habit of turning one-off designs into reusable components.Nice to haveExperience verifying memory-adjacent IP (SRAM controllers/periphery, MBIST/scan integration) and power-aware/UPF simulation flows.GLS proficiency (SDF back-annotation), familiarity with FPGA bring-up and HW/SW test harnesses.Python/Tcl for stimulus generation, log parsing, coverage triageBackground in AI/DSP accelerators or quantized dataflows (helpful context for CxR use-cases).ApplySend your CV and a short note (2–3 paragraphs on a design you owned, your toughest bug & how you solved it, an intro on what you like to do and how you see yourself as an engineer)Interview flow (indicative)30-min intro with HR (role/context)Second Technical Deep Dive(Optional) Third Technical Deep DiveSystems/product conversation with management #J-18808-Ljbffr
