Senior Analog Design Engineer
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Kandou is redefining AI hardware economics with a chiplet-based, energy-efficient memory fabric. We seek an Analog Design Engineer to lead design, modeling, and verification of high-speed Serdes in advanced nodes, collaborating across architecture, layout, and verification teams.
Requirements include a Master’s/PhD in Electronics and 5+ years in analog design, with Cadence Virtuoso and Ocean/MDL experience. Join us in a frontier role at the intersection of AI and semiconductor innovation.
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