Staff IC Layout Design Engineer
vor 3 Wochen
Description
Job Description
Job Title: Staff IC Layout Design Engineer – Layout Team Leader
Reporting to: IC Design Engineering Director
Location: Biel, Switzerland
Power Integrations, Inc., is a Silicon Valley-based supplier of high-performance electronic components used in high-voltage power-conversion systems. Our integrated circuits and diodes enable compact, energy-efficient AC-DC power supplies for a huge range of electronic products including mobile devices, TVs, PCs, appliances, smart utility meters and LED lights. Our SCALE IGBT drivers enhance the efficiency, reliability and cost of high-power applications such as industrial motor drives, solar and wind energy systems, electric vehicles, andhigh-voltage DCtransmission.
For our design engineering team located in Biel/Bienne, Switzerland, Power Integrations is currently recruiting fora Team Leader - Staff IC LayoutDesign Engineer
Responsibilities:
Development of economic, efficient, and demanding gate driver and power conversion related products. Layout design of smart power functional blocks and complete mixed signal ICs from block level to tape-out release, with focus on top level layout design. Run automated DRC and LVS controls to ensure the full matching with designed electrical circuit. Work with colleagues in the IC Design team to define a chip architecture, refine it to block level and be responsible for IC top Level Floor Planning and area estimation. Define innovative layout solutions that implement the complex and intellectually challenging functions and control schemes necessary to deliver target system performance. Coach and support layout engineer(s)during physical design and related verification. Lead layout team with focus both on technical side and team management. Training of young layout engineers to bring them to full speed. Contribute toTechnology Process and Layout Design Methodologyimprovements.Education and Experience:
BSc or MSc in microelectronics or any related degree. Minimum 8-10 years’ experience in IC layout Design. Deep knowledge and understanding of best-practice IC layout design methods (theory and practice). Strong analytical and problem-solving skills. Strong attitude in team working. Solid experience on analog and mixed signal Integrated Circuit Layout Design and related CAD tools, Cadence Virtuoso and Calibre verification tools knowledge is a strong plus. Strong knowledge of chip top level assembly and tape out closure procedures. Good understanding of semiconductor technology with focus on medium / high voltage CMOS, BCD, BiCMOS, including parasitic components and related effects. Knowledge of ESD and latch up issues reduction techniques. Successful track record of taped out IC designs. Deep knowledge of English language, both written and spoken.What we have to offer
Modern work space in a brand new building, good public transport accessibility, free parking spaces and electric charging stations onsite Flexible working hours, 25 days of vacation Employee Stock Purchase Program and a Generous employee referral scheme Work within a highly collaborative, international team environment A broad scope of tasks and the possibility to take on responsibilities in a fast paced, innovative and growing company. Many benefits such as free fruit, coffee, massage service, etc.
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