Principal Digital IC Design Engineer
vor 4 Monaten
110-150k CHF (dependent on years and relevance of experience)
(Visa sponsorship is NOT available for this position)
Required Skills
- M.Sc. or Ph.D. degree in electrical engineering / communication systems
- Circa 10+ years' of ASIC, digital front-end IC design experience in Verilog
- Full chip design of digital / mixed-signal products
- Ability to lead and take ownership of complex projects
- Strong mathematical, statistical, analytical and conceptual skills for complex problem solving
- Flexible attitude, team player, ability to take responsibility
- Collaborative approach, confident working with diverse teams - and ability to offer guidance to other engineers
- Confident working with analog teams
- French language skills
- Knowledge of the full digital design flow
- Synthesis, implementation, DFT, back-end / physical design understanding
- FPGA implementation, prototyping - VHDL
- DSP / filters
- UVM Verification - system verilog
- power management ICs / image sensors
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