Verification IC Design
vor 3 Wochen
Thisrole is for a experts in Semiconductor Verification, specificallyin low-power, connected MCU and DSP systems. These products serveapplications in miniaturized, battery-powered devices, such ashearing aids, Bluetooth radios, and glucose monitors. The goal isto ensure these devices are highly efficient, low-power, and highlyreliable. You will primarily focus on verification of thesedesigns, ensuring they meet all specificationsreliably.
ClientDetails
Join our client'scutting-edge team in their R&D Hub in Neuchatel, where theydevelop miniature, highly reliable, low-power devices that powercritical health and connectivity solutions like hearing aids andglucose monitors. As a Verification IC Digital Design (SrStaff/Principal), you'll ensure robust, reliable performance intheir next-gen mixed-signal products through expert UVM-basedverification.
#UVM Verification
#Mixed-Signal Design
#MCU DSP low-power
#Formal Verification
#System Verification
#SoC Verification
#Semiconductor Architect
#Battery-PoweredApplications
#Chip-LevelVerification
#SystemEngineering for Medical Devices
Description
MainMissions of the Verification IC Design (SrStaff/Principal)- Architect and verify connected, low-power devices,translating customer needs into technical roadmaps.
- Collaborate with design, applications, and marketingteams to maximize IP reuse and ensure our products meet industryneeds.
- Drive verification methods andintroduce formal verification practices for enhancedreliability.
Profile
Thesuccessful Verification IC Digital Design (Sr Staff/Principal)should have part or entire set of skills mentioned below :- 7+years in mixed-signal semiconductor design andverification with strong UVM experience.
- Proven expertise in formal and dynamic verification,preferably at a chip level.
- Strong technicalcommunication and cross-functional collaboration skills.
- Communication in English, French is a nice to have.
- Knowledge of MCU and DSP-based systems forlow-power applications.
- Strong familiaritywith UVM-based methods, ideally with experience on a full chiprather than isolated IP blocks.
- Familiaritywith both formal (static) and dynamic verification, with awillingness to help implement formal methods.
- Languages: Verilog,SystemVerilog,
- VerificationMethodology: UVM (Universal VerificationMethodology)
- VerificationTypes: Formal (Static) and DynamicVerification
- Low-Power DesignConcepts: Expertise in MCU/DSP-based systems withpower efficiency
- SoftwareTools: Simulation tools (Cadence, Synopsys, MentorGraphics), IP reuse tools, DSP/mixed-signal designsoftware
- KnowledgeAreas: Mixed-Signal Design, MCU/DSP architectures,IP Reuse
- Industry-Specific: Medicaland industrial application knowledge
- Soft Skills: Strongcommunication skills, business acumen, customer engagementexperience
JobOffer
Local Benefits:
- ChildAllowance,
- Supplementary salary : Salary paidin 12 installement + 13th month,
- 5 weeks ofholidays (25 days),
- Corporate bonusprogram,
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