Senior Digital IC Design Engineer

vor 2 Wochen

MarinEpagnier, Neuenburg, Schweiz onsemi Vollzeit CHF 120'000 - CHF 180'000 pro Jahr
Description

About Us

At onsemi, we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world's most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Our group develops state-of-the-art precision analog IPs that are used in a large variety of different products and markets.

The Role

We are looking to expand our team with a Senior Digital IC Design Engineer with experience in mix-signal design and verification. You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in the design of complex mix-signal IPs and have familiarity with analog blocks such as DACs, ADCs, PLL and wireless interface etc. Experience with signal chain optimization and low power is desired.

Why Join Us

We create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer & charitable programs. You will be entitled to 25 vacation days per year, and you will have a very competitive benefit package. You will be able to build up a career in a successful international company, and you can participate in interesting international projects.

Responsibilities
  • Participate in feasibility studies and architecture definitions of new analog IP components.
  • Drive development, verification, layout and bench evaluation of state-of-the-art CMOS and SOI designs which can be reused across different market segments.
  • Work diligently with the  given requirements to accomplish project goals and meet schedule requirements.
  • Lead small teams on sub-projects.
  • Contribute to the block integration in complex mixed-signals System-on-Chip (SoC) designs.
  • Propose innovative and creative solutions where necessary to meet customer & product needs.
  • Debug of complex integrated circuit problems in the laboratory. Collaborate in debug efforts as needed.
  • Analyze design aspects and collaborate with other team members to develop DFT strategy for block designs.
  • Document designs including architecture and circuit descriptions, testing procedures, and safety mechanisms.
  • Interface with test, product, and applications engineering to drive the design to a successful production release.
Qualifications

What You'll Need

  • MSc or PhD in electrical engineering, microelectronics or similar
  • Minimum 5 years experience in ultra-low-power mixed-signal design in at least one of the following fields: ADC, DAC, PLL, power management systems.
  • RTL design of digital IP blocks and systems in Verilog/SystemVerilog
  • Capacity to think at the system level and to operate as a technical leader
  • Prior exposure to analog design in deep-submicron processes (130nm or below)
  • Creativity, dynamism, reliability and team spirit
  • Strong communication and technical writing skills in English. 
  • Excellent written and verbal communication skills in English
  • Eligibility to work in Switzerland

What Else You May Bring 

  • Experience in some of the following areas is a plus:
  • Project/task leadership
  • Knowledge Verilog-A or VHDL-AMS is a plus.
  • Experience with embedded CPUs (e.g. ARM Cortex, DSP), AMBA bus protocols (AHB/APB) is a plus
  • Programming in Python for automation and in C/C++ for embedded software
  • Design intent (timing constraints/SDC, power intent/UPF)
  • Design of accelerators and signal processing components
  • RTL to GDS flow, including logic synthesis, place-and-route, STA, power analysis
  • Advanced digital verification methodology (e.g. UVM)
  • Knowledge in Functional Safety
  • Knowledge of French

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