Aktuelle Jobs im Zusammenhang mit Senior Asic Designer - Genf, Genf - Brookhaven National Laboratory
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Senior ASIC Engineer
Vor 6 Tagen
Genf, Genf, Schweiz Brookhaven National Laboratory VollzeitThe mission of Brookhaven National Laboratory is to develop cutting-edge instrumentation and maintain expertise in high technology areas essential for experimental research. Development of facilities is motivated by present research programs and anticipated future directions.We are seeking a motivated Senior ASIC Design Engineer to join our team as a senior...
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ASIC Designer Position
Vor 6 Tagen
Genf, Genf, Schweiz Brookhaven National Laboratory VollzeitBrookhaven National Laboratory is committed to providing fair, equitable, and competitive compensation for its employees. The salary range for this position is $106650 - $138650 per year.This position requires a strong background in ASIC design, including experience with CMOS process families and familiarity with CAD/EDA tools for ASIC design. A bachelor's...
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Advanced IC Design Role
Vor 6 Tagen
Genf, Genf, Schweiz Brookhaven National Laboratory VollzeitAbout the JobThis is an exciting opportunity to join our team as a Senior ASIC Design Engineer and contribute to the development of cutting-edge instrumentation and expertise in high technology areas essential for experimental research. As a member of our team, you will have the opportunity to work on complex and unique projects, collaborate with a diverse...
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ASIC Readout Designer
vor 1 Tag
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Designer Intérieur Senior
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CERN ASIC Developer
Vor 4 Tagen
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Senior Ux Designer
vor 2 Wochen
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Senior UX Designer
Vor 4 Tagen
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Senior Visual Designer
Vor 7 Tagen
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UX/UI Designer
vor 1 Woche
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Senior Product Designer
Vor 4 Tagen
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Design Experience Specialist
Vor 7 Tagen
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Senior UX Designer
vor 1 Woche
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Technical Design Expert
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FPGA Engineer
vor 3 Wochen
Genf, Genf, Schweiz myScience VollzeitFPGA Engineer (HSE-RP-IL-2025-39-GRAP)CERNPublished 7 March 2025Closing Date 30 March 2025Workplace Geneva, Lake Geneva region, SwitzerlandCategory ElectroengineeringComputer SciencePosition Engineer / TechnicianJob DescriptionYour responsibilitiesCERN designs, develops, and operates particle accelerators and experiments for scientific research to understand...
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Senior IT Infrastructure Specialist
Vor 7 Tagen
Genf, Genf, Schweiz EFG Bank Genève VollzeitWe are looking for a dedicated professional to join our team as a Senior Network Engineer. In this role, you will work alongside a diverse group of engineers based in Geneva, liaising with colleagues across our global operations in over 30 countries.Your primary focus will be on the design, implementation, and support of our global network services. You will...
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Fpga Engineer
Vor 7 Tagen
Genf, Genf, Schweiz CERN & Society Foundation VollzeitCERN designs, develops, and operates particle accelerators and experiments for scientific research to understand the fundamental laws of the universe. These activities may generate stray radiation due to the interaction between beams and matter. The radiation detectors installed close to the various beam lines and targets allow CERN to accurately monitor...
Senior Asic Designer
vor 1 Woche
The mission of the Instrumentation Division is to develop state-of-the-art instrumentation required for experimental research programs at Brookhaven Lab and to maintain the expertise and facilities in specialized high technology areas essential for this work. Development of facilities is motivated by present Brookhaven research programs and anticipated future directions of research. Our work has a significant impact on programs throughout the world that rely on state-of-the-art radiation detectors and readout electronics. We seek a motivated Senior ASIC Design Engineer to join our team as a senior ASIC designer for developing Monolithic Active Pixel Sensors (MAPS) - based Silicon Vertex and Tracking (SVT) detector technology for the collider experiments such as lepton-lepton Future Circular Collider (FCCee) and for the electron-Proton/Ion Collider (ePIC) at the Electron Ion Collider (EIC). This position combines the direct development of MAPS for FCCee with work on MAPS for the EIC and ALICE-ITS3 in such a way that the candidate's place of work, for the initial one year, will be CERN, Geneva, Switzerland, which is an alternate work site for BNL. In this role, you will design, develop, and build analog, digital, and mixed-mode circuits for Monolithic Active Pixel Sensors (MAPS) that integrate radiation sensors and readout electronics on the same substrate with applications in tracking of relativistic charged particles. You will also be involved in developing other ASICs for instruments developed for BNL and our partners. You will collaborate with a diverse, multi-disciplinary group of scientists, engineers, and other technical team members in our ASIC team, the Instrumentation Division and across the entire community at BNL and elsewhere. We look for candidates from a broad range of ASIC design expertise from base-band analog, RF, digital, data converters, data transmission and sensors, with preference given to those who possess experience in the MAPS technology and radiation sensors readout. Our science and engineering challenges are complex and unique We are engaged in the development of ASICs for particle detectors, high resolution X- and gamma-ray spectrometers, and high-rate photon counters and imagers. Our ASICs work in extreme environments (such as cryogenic temperatures) or must withstand extreme irradiation doses, thus represent unique layout challenges. We are also actively carrying out R&D programs focused on Electro-Photonics, Quantum Information Science, Artificial Intelligence & Machine Learning, and Neuromorphic Processing that require ASICs with specific layouts. The applications of these ASICs extend beyond BNL to a variety of international user facilities: your work will have the potential to shape the instruments used for scientific discovery and engineering advancements across the globe Essential Duties and Responsibilities: Create innovative solutions, inspire new circuits design and spearhead the adoption of novel microelectronics technologies, particularly for MAPS, and play an important role in developing MAPS for silicon vertex and tracking detectors. Take a lead role in the design of analog, digital or mixed-mode (i.E. analog-digital) ASICs for scientific instruments. Develop design specifications based on theoretical analyses and in conjunction with application needs and carry out complex and independent design activities, including oversight of efforts of team members. Design circuit networks, using schematic entry and layout tools with full-custom or timing-driven layout tools in Cadence or similar CAD/EDA environment. Develop models of circuit networks and system components in hardware description languages specific for analog or digital modeling (Verilog-A and Verilog/SystemVerilog), perform or contribute to full-custom or automated from RTL code physical ASIC design implementation. Build analog or digital test-benches and carry-out mixed analog and digital circuit simulations. Lead project documentation, test-board designs, and laboratory testing. Engage in codesigning of ASICs and sensors with Technology CAD tools, developing ideas in appealing directions in machine learning, artificial intelligence, quantum science and others. Construct new project initiatives and develop proposals, making use of emerging technologies. Position Requirements Required Knowledge, Skills, and Abilities: Bachelor's degree in engineering, physical sciences discipline or closely related field of study. Minimum seven (7) years progressively responsible related work experience. Experience with specificity of MAPS technology designed and developed using CMOS process families. Familiarity with ASIC design processes and flows, CAD/EDA tools for ASIC design and their interoperability. Ability to work with group members in a multi-user process and design managed environment, and step up to challenges. Readiness for working on challenging projects that may have tight schedules. Preferred Knowledge, Skills, and Abilities: Advanced degree (MSc or PhD) in engineering, physical sciences discipline or closely related field of study. Knowledge of MAPS development for ALICE-ITS2/ITS3 or EIC-ePIC SVT detector. Knowledge of readout integrated circuits for radiation sensors, including signal processing, signal filtering, signal conversion, data transmission, high speed electronics. Sound background of solid-state circuits and integrated circuit design. Ability to execute analog and/or digital ASIC design flows for performing design tasks. Knowledge of front-end and back-end ASIC design elements, such as layout, physical verification, and design verification. Ability of working with SKILL, Tcl/Tk, ASSURA and Calibre DRC/LVS verification decks syntax as well as operating system shell scripting or other scripting languages, such as Pearl, Python. Brookhaven Laboratory is committed to providing fair, equitable, and competitive compensation. The full salary range for this position is $106650 - $138650 / year. Salary offers will be commensurate with the final candidate's qualification, education, and experience and considered with the internal peer group. Additional Information: As a CERN-based employee, a Cost of Living Adjustment will be provided in addition to salary. #J-18808-Ljbffr
