Senior Design Verification Engineer

vor 1 Woche


switzerland europe ic resources Vollzeit

Working for a cutting edge semiconductor company, I have a brand-new Senior Digital Design Verification opportunity to work on the latest high-speed communication ASIC technologies. You will be part of key R&D projects for complex IP - working closely with designers, architects and other verification engineers in the wider business. 110-120k CHF Must have skills: University degree - BSc / MSc / PhD in Electronics, Microelectronics, Physics or Computer Science Industry experience in digital verification - for FPGA / ASIC (VHDL and / or Verilog, System verilog) Good language & communication skills in English Strong coding skills - python / C / C++ / System C UVM environments, libraries and complex test-benches for digital IPs Bonus / "nice-to-have" skills: Definition of complex digital architecture High-speed digital connectivity and protocols - Serdes, ethernet, USB, PCIe, AMBA / AXI, MAC, PHY, cache coherency - MESI Testing / validation Matlab / Simulink modelling experience confident software coding skills - C++ / python etc formal / software verification - jasper gold, onespin, SVA - system verilog assertions language & communication skills in French



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