Aktuelle Jobs im Zusammenhang mit Senior Digital Design Engineer Job - Neuenburg, Neuenburg - Michael Page International (Switzerland) SA
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Senior Digital Design Engineer Job
vor 1 Woche
About Our Mission
We are committed to helping drive a more sustainable future through our innovative semiconductor technologies.
We operate across 20+ manufacturing sites globally, including a strong presence in Europe, Asia, and North America.
We have a forward-thinking approach to sustainability and energy-efficient solutions, with a focus on energy-efficient solutions like SiC and GaN.
Job Responsibilities
- As the Digital IC Design Engineer, you will play a pivotal role in shaping product lines, driving innovation, and ensuring technical excellence.
- Mentor a team of engineers, fostering a collaborative and innovative environment.
- Architect, specify, implement, simulate, and benchmark MCU, DSP systems, and hardware accelerators that push the boundaries of technology.
- Spearhead improvements in design methodology and workflows, ensuring the team stays at the cutting edge of semiconductor development.
- Collaborate with product integration teams to define, integrate, and optimize these systems.
- Lead the verification process and FPGA prototyping of systems to ensure robust and reliable designs.
- Coordinate closely with the software team to guide SDK development for these systems, enabling seamless software-hardware integration.
Requirements
General Skills
- Bachelor's degree in Electrical Engineering or a related technical field.
- 5 to 8 years of experience in semiconductor product development.
- Expertise in embedded CPUs and AMBA bus protocols (AHB/APB).
- Experience in RTL design of digital IP blocks and systems, using Verilog/SystemVerilog.
- Deep knowledge of design intent methodologies, including timing constraints (SDC) and power intent (UPF).
- Write technical documentation and communicate complex ideas clearly.
- Fluent English is required; French is a plus.
Bonus Skills
- Experience with CPU/MCU design, SystemRDL, or IP-XACT.
- RISC-V architecture.
- Experience in Python and C/C++.
- RTL-to-GDS flow, including logic synthesis, place-and-route, STA, and power analysis.
- Digital verification methodologies, such as UVM.
What We Offer
We offer a competitive compensation package, including:
- Child Allowance.
- Supplementary salary: Salary paid in 12 installments + 13th month.
- 5 weeks of holidays (25 days).
- Corporate bonus program.
