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Senior Timing Engineer

vor 1 Monat


Lausanne, Waadt, Schweiz IC Resources Vollzeit
STA/Timing Engineer Opportunity

We are seeking a highly skilled STA/Timing Engineer to join our client's Physical Design team in Lausanne. This is an exciting opportunity to work with a fabless Semiconductor company that specializes in high-speed bus transfer in wireless communications.

Our client is a pre-IPO company with multiple sites across the globe, including Germany and the UK. They are looking to grow their team and are open to considering candidates based in one of these locations.

The ideal candidate will have experience with block and chip level STA, good knowledge of the RTL-GDS flow, and experience with SDC constraints. They will also be proficient in EDA tools such as Tempus, Genus, and LEC, and have a proven track record of successful tapeouts.

If you are a motivated and experienced engineer looking for a new challenge, please get in touch with Jordan Browne to learn more about this opportunity.