Embedded Firmware Engineer for FPGA/SoC
vor 2 Wochen
Your responsibilities
In this position you will contribute to the development of the readout architecture for the LHCb experiment in anticipation for the Run 4 data taking period. Within the context of the LHCb Upgrade 1b, new technologies are being adopted throughout the readout architecture in order to enhance the particle identification capabilities of LHCb. As part of the EP-LBC group, you will participate in the development of a high-throughput readout backend based on FPGAs with improved timing performance over the current system.
As a firmware engineer in the project, you will:
- Develop test setups to conduct timing and readout performance characterization of systems
- Integrate and test new gateware components developed within the LHCb collaboration
- Develop FPGA algorithms for realtime processing and concentration of frontend data
- Collaborate closely with gateware, software and control systems engineers
- Debug installations in the field, as part of a multidisciplinary team
- Document software and gateware designs, and provide standard operating procedures for users within the collaboration
Your profile
Skills
Demonstrated Experience in the following areas:
- Writing portable VHDL gateware compatible with Altera and Xilinx FPGAs
- Distribution of low-jitter clock signals with deterministic phase across FPGAs
- Integration of low-power GBT (lpGBT) optical links on new FPGA designs
- Embedded gateware and software development targeting Zynq System-on-Chips
- Fluent in English
Eligibility criteria:
- You are a national of a CERN Member or Associate Member State.
- By the application deadline, you have a maximum of two years of professional experience since graduation in Applied Physics or Electronics Engineering (or a related field) and your highest educational qualification is either a Bachelor's or Master's degree.
- You have never had a CERN fellow or graduate contract before.
- Applicants without a University degree are not eligible.
- Applicants with a PhD are not eligible.
Additional Information
Job closing date: December 9 at 23:59 CET.
Contract duration: 24 months, with a possible extension up to 36 months maximum.
Working hours: 40 hours per week
Target start date: 01-January-2025
Job reference: EP-LBC-2024-194-GRAE
Field of work: Electrical or Electronics Engineering
What we offer
- A monthly stipend ranging between 5134 and 5647 Swiss Francs (net of tax).
- Coverage by CERN's comprehensive health scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund.
- Depending on your individual circumstances: installation grant; family, child and infant allowances; payment of travel expenses at the beginning and end of contract.
- 30 days of paid leave per year.
- On-the-job and formal training at CERN as well as in-house language courses for English and/or French.
About us
At CERN, the European Organization for Nuclear Research, physicists and engineers are probing the fundamental structure of the universe. Using the world's largest and most complex scientific instruments, they study the basic constituents of matter - fundamental particles that are made to collide together at close to the speed of light. The process gives physicists clues about how particles interact, and provides insights into the fundamental laws of nature. Find out more on http://home.cern.
Diversity has been an integral part of CERN's mission since its foundation and is an established value of the Organization. Employing a diverse workforce is central to our success. #J-18808-Ljbffr
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