STA/Timing Engineer
vor 4 Wochen
- Lausanne I am looking for an STA/Timing Engineer to come and join a client in Lausanne.
- IPO company that specialises in high speed bus transfer in wireless communications and are already challenging established tech giants within the industry.
Requirements:
Experience with block and chip level STAGood knowledge of the complete RTL-GDS flowExperience with SDC constraintsExperience with EDA tools such as Tempus, Genus and LECProved experience in 7+ successful tapeoutsIf you are interested in finding out more about this opportunity or others then please contact Jordan Browne.
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SOC Chip Lead, Ch, Uk, De, Dk
vor 1 Woche
Lausanne, Waadt, Schweiz Kandou Bus VollzeitChallenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy-efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of today's...